High Speed and Area Efficient 2D DWT Processor based Image Compression" Signal & Image Processing

This paper presents a high speed and area efficient DWT processor based design for Image Compression applications. In this proposed design, pipelined partially serial architecture has been used to enhance the speed along with optimal utilization and resources available on target FPGA. The proposed model has been designed and simulated using Simulink and System Generator blocks, synthesized with Xilinx Synthesis tool (XST) and implemented on Spartan 2 and 3 based XC2S100-5tq144 and XC3S500E-4fg320 target device. The results show that proposed design can operate at maximum frequency 231 MHz in case of Spartan 3 by consuming power of 117mW at 28 degree/c junction temperature. The result comparison has shown an improvement of 15% in speed.

[1]  Francescomaria Marino.  Two fast architectures for the direct 2-D discrete wavelet transform , 2001, IEEE Trans. Signal Process..

[2]  Y. Suzuki,et al.  Image compression using wavelet transform and vector quantization with variable block size , 2008, 2008 IEEE Conference on Soft Computing in Industrial Applications.

[3]  Jie Guo,et al.  Efficient FPGA implementation of modified DWT for JPEG2000 , 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.

[4]  S.K. Pattanaik,et al.  A Lossless Image Compression Technique using Simple Arithmetic Operations and its FPGA Implementation , 2006, 2006 IEEE International Conference on Industrial Technology.

[5]  Zhao Baojun,et al.  An efficient FPGA design for lifting wavelet , 2004, Proceedings. ICCEA 2004. 2004 3rd International Conference on Computational Electromagnetics and Its Applications, 2004..

[6]  Mislav Grgic,et al.  Performance analysis of image compression using wavelets , 2001, IEEE Trans. Ind. Electron..

[7]  A. Saeb,et al.  CDF(2,2) wavelet lossy image compression on primitive FPGA (XC9572) , 2005, International Symposium on Signals, Circuits and Systems, 2005. ISSCS 2005..

[8]  M. Grgic,et al.  Optimal decomposition for wavelet image compression , 2000, IWISPA 2000. Proceedings of the First International Workshop on Image and Signal Processing and Analysis. in conjunction with 22nd International Conference on Information Technology Interfaces. (IEEE.

[9]  Sujit Dey,et al.  Adaptive and energy efficient wavelet image compression for mobile multimedia data services , 2002, 2002 IEEE International Conference on Communications. Conference Proceedings. ICC 2002 (Cat. No.02CH37333).

[10]  Ramachandran Vaidyanathan,et al.  Reconfigurable Implementation of Wavelet Integer Lifting Transforms for Image Compression , 2006, 2006 IEEE International Conference on Reconfigurable Computing and FPGA's (ReConFig 2006).

[11]  G. Robert Redinbo,et al.  Fault tolerance design in JPEG 2000 image compression system , 2005, IEEE Transactions on Dependable and Secure Computing.