A 75.1dB SNDR 840MS/s CT ΔΣ modulator with 30MHz bandwidth and 46.4fJ/conv FOM in 55nm CMOS

This paper presents a 30MHz bandwidth continuous-time (CT) ΔΣ modulator with direct resistor feed-forward and fast excess loop delay (ELD) compensation method to enhance the loop stability. Moreover, the proposed design incorporates analog DAC background calibration and offset calibration for fully dynamic latch comparator. The modulator achieves 77.1dB DR and 75.1dB SNDR in 30MHz bandwidth, while occupying 0.071mm2 in 55nm CMOS and achieving a FoM (Power/(2BW·2ENOB)) of 46.4fJ/conv.

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