16.3 A −246dB Jitter-FoM 2.4GHz Calibration-Free Ring-Oscillator PLL Achieving 9% Jitter Variation Over PVT

Low-jitter phase-locked loops (PLLs) are critical building blocks in various systems, including wireless and wireline communications and ADCs. LC oscillators exhibit low phase noise (PN) but suffer from large area, magnetic coupling, and small tuning range. While ring voltage-controlled oscillators (RVCO) are free from the above issues, their inferior PN performance restricts their applicability. The injection-locked clock multiplier (ILCM) attains a low PN through phase realignment. However, both the PN and the reference spur deteriorate when the injection instant drifts over PVT. Although the frequency-tracking loop (FTL) can calibrate the center frequency, its power consumption, converging speed, and accuracy limit the performance of the ILCM [1, 2]. The Type-I PLL performs wideband filtering [3], but its efficiency is 3dB lower than that of the ILCM [4]. A PLL with fast phase-error correction (FPEC) [4] realizes a PN filtering close to the ILCM and keeps a small reference spur. Nevertheless, both Type-I and FPEC PLLs rely on the closed-loop wideband filtering to achieve a low PN. The drifted loop gain over PVT significantly degrades jitter performance and even causes instability, implying a trade-off between wideband filtering and stability. Consequently, a loop-gain calibration [4] is necessary to maintain the stability and low PN.