Initializability analysis of synchronous sequential circuits

This article addresses the problem of initializing synchronous sequential circuits, that is, of generating the shortest sequence able to drive the circuit to a known state, regardless of the initial state. Logic initialization is considered, being the only one compatible with current commercial tools. A hybrid Genetic Algorithm is proposed, which combines general ideas from evolutionary computation with specific techniques, well suited to the addressed problem. For the first time, experimental results provide data about the complete set of ISCAS'89 circuits, and show that, despite the inherent algorithm incompleteness, the method is capable of finding the optimum result for the considered circuits. A prototypical tool implementing the algorithm found better results than previous methods.

[1]  David E. Goldberg,et al.  Genetic Algorithms in Search Optimization and Machine Learning , 1988 .

[2]  Edward A. Feigenbaum,et al.  Switching and Finite Automata Theory: Computer Science Series , 1990 .

[3]  Giovanni Squillero,et al.  RT-Level ITC'99 Benchmarks and First ATPG Results , 2000, IEEE Des. Test Comput..

[4]  David Bryan,et al.  Combinational profiles of sequential benchmark circuits , 1989, IEEE International Symposium on Circuits and Systems,.

[5]  Seh-Woong Jeong,et al.  Exact calculation of synchronizing sequences based on binary decision diagrams , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[6]  Seh-Woong Jeong,et al.  Exact calculation of synchronization sequences based on binary decision diagrams , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

[7]  Randal E. Bryant,et al.  Symbolic Boolean manipulation with ordered binary-decision diagrams , 1992, CSUR.

[8]  Daniel G. Saab,et al.  Initialization of Sequential Circuits and its Application to ATPG , 1998, J. Electron. Test..

[9]  Carl Pixley,et al.  Minimum Length Synchronizing Sequences of Finite State Machine , 1993, 30th ACM/IEEE Design Automation Conference.

[10]  Bernd Becker,et al.  On the (non-)resetability of synchronous sequential circuits , 1996, Proceedings of 14th VLSI Test Symposium.

[11]  Daniel G. Saab,et al.  On the initialization of sequential circuits , 1994, Proceedings., International Test Conference.

[12]  Paolo Prinetto,et al.  A new approach for initialization sequences computation for synchronous sequential circuits , 1997, Proceedings International Conference on Computer Design VLSI in Computers and Processors.

[13]  Pinaki Mazumder,et al.  Genetic Algorithms for VLSI Design, Layout and Test Automation , 1998 .