Modeling of error mechanisms in Sigma-Delta modulators

Expressions obtained in the previous chapter for different modulator architectures take into account only quantization noise. However, even though it is usually accepted that ΣΔ conversion is intrinsically less sensitive to the building block non-idealities than other data conversion techniques [Cand92], it is necessary to take into account the impact of the error mechanisms associated with such non-idealities for electrical implementations. The importance of these increases when the specifications of the modulator are demanding because they can become the dominant error sources [Bose88a] [Dias92b] [Yuka87] . Analyzing the basic block non-idealities is needed with two well differentiated objectives: on the one hand, the obtainment of behavioral models that support a fast and precise time-domain simulation; on the other, the attainment of approximate equations that, in closed form, express the power of the error caused by each non-ideality, as a function of itself and other design variables. This chapter is devoted to the obtainment of such equations, which will be combined with statistic optimization methods for the automatic synthesis of ΣΔ modulators.