Reconfigurable Hardware Architecture of a Shape Recognition System Based on Specialized Tiny Neural Networks With Online Training

Neural networks are widely used in pattern recognition, security applications, and robot control. We propose a hardware architecture system using tiny neural networks (TNNs) specialized in image recognition. The generic TNN architecture allows for expandability by means of mapping several basic units (layers) and dynamic reconfiguration, depending on the application specific demands. One of the most important features of TNNs is their learning ability. Weight modification and architecture reconfiguration can be carried out at run-time. Our system performs objects identification by the interpretation of characteristics elements of their shapes. This is achieved by interconnecting several specialized TNNs. The results of several tests in different conditions are reported in this paper. The system accurately detects a test shape in most of the experiments performed. This paper also contains a detailed description of the system architecture and the processing steps. In order to validate the research, the system has been implemented and configured as a perceptron network with back-propagation learning, choosing as reference application the recognition of shapes. Simulation results show that this architecture has significant performance benefits.

[1]  G. Destri,et al.  Shape searching in real world images: a CNN-based approach , 1996, 1996 Fourth IEEE International Workshop on Cellular Neural Networks and their Applications Proceedings (CNNA-96).

[2]  Yoshiki Uchikawa,et al.  Trajectory control of robotic manipulators using neural networks , 1991 .

[3]  J. Alarcon,et al.  A new Real-Time Hardware Architecture for Road Line Tracking Using a Particle Filter , 2006, IECON 2006 - 32nd Annual Conference on IEEE Industrial Electronics.

[4]  E. Sanchez,et al.  Implementation of neural constructivism with programmable hardware , 1996, 1st International Symposium on Neuro-Fuzzy Systems, AT '96. Conference Report.

[5]  Filippo Sorbello,et al.  Multi-layer perceptron mapping on a SIMD architecture , 2002, Proceedings of the 12th IEEE Workshop on Neural Networks for Signal Processing.

[6]  M. A. Hannan Bin Azhar,et al.  Design of an FPGA based adaptive neural controller for intelligent robot navigation , 2002, Proceedings Euromicro Symposium on Digital System Design. Architectures, Methods and Tools.

[7]  Narayanan Vijaykrishnan,et al.  A generic reconfigurable neural network architecture as a network on chip , 2004, IEEE International SOC Conference, 2004. Proceedings..

[8]  Patrick van der Smagt,et al.  Introduction to neural networks , 1995, The Lancet.

[9]  M. Bera,et al.  The Totem neurochip: an FPGA implementation , 2004, Proceedings of the Fourth IEEE International Symposium on Signal Processing and Information Technology, 2004..

[10]  Zhen Zhu,et al.  Self-organizing learning array , 2005, IEEE Transactions on Neural Networks.

[11]  Liam McDaid,et al.  Using Xilinx FPGAs to implement neural networks and fuzzy systems , 1997 .

[12]  Eduardo Sanchez,et al.  Hardware Reconfigurable Neural Networks , 1998, IPPS/SPDP Workshops.

[13]  Eric Monmasson,et al.  FPGA Design Methodology for Industrial Control Systems—A Review , 2007, IEEE Transactions on Industrial Electronics.

[14]  Jin Lianwen,et al.  A mixed parallel neural networks computing unit implemented in FPGA , 2003, International Conference on Neural Networks and Signal Processing, 2003. Proceedings of the 2003.

[15]  Araceli Sanchis,et al.  A Static Images Based-System for Traffic Signs Detection , 2006, Artificial Intelligence and Applications.

[16]  Martin T. Hagan,et al.  Neural network design , 1995 .

[17]  Brad Hutchings,et al.  Density enhancement of a neural network using FPGAs and run-time reconfiguration , 1994, Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines.

[18]  H. Hikawa,et al.  Implementation of simplified multilayer neural networks with on-chip learning , 1995, Proceedings of ICNN'95 - International Conference on Neural Networks.

[19]  Toshio Fukuda,et al.  Theory and applications of neural networks for industrial control systems , 1992, IEEE Trans. Ind. Electron..

[20]  Toshio Fukuda,et al.  Neuromorphic control: adaptation and learning , 1992, IEEE Trans. Ind. Electron..

[21]  D. Hammerstrom,et al.  A VLSI architecture for high-performance, low-cost, on-chip learning , 1990, 1990 IJCNN International Joint Conference on Neural Networks.

[22]  Naleih M. Botros,et al.  Hardware implementation of an artificial neural network using field programmable gate arrays (FPGA's) , 1994, IEEE Trans. Ind. Electron..

[23]  Hassan Shojania,et al.  A VLSI architecture for high performance CABAC encoding , 2005, Visual Communications and Image Processing.

[24]  Clay S. Gloster,et al.  Implementation of a probabilistic neural network for multi-spectral image classification on an FPGA based custom computing machine , 1998, Proceedings 5th Brazilian Symposium on Neural Networks (Cat. No.98EX209).

[25]  R. Stephenson.  A and V , 1962, The British journal of ophthalmology.

[26]  S. Bridges,et al.  A reconfigurable VLSI learning array , 2005, Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005..

[27]  Y. Taright,et al.  FPGA implementation of a multilayer perceptron neural network using VHDL , 1998, ICSP '98. 1998 Fourth International Conference on Signal Processing (Cat. No.98TH8344).

[28]  J. Torresen,et al.  Efficient recognition of speed limit signs , 2004, Proceedings. The 7th International IEEE Conference on Intelligent Transportation Systems (IEEE Cat. No.04TH8749).

[29]  Liyanage C. De Silva,et al.  Multimodal Approach to Human-Face Detection and Tracking , 2008, IEEE Transactions on Industrial Electronics.

[30]  M.A. Salichs,et al.  Neural traffic sign recognition for autonomous vehicles , 1994, Proceedings of IECON'94 - 20th Annual Conference of IEEE Industrial Electronics.

[31]  Ruben Salvador,et al.  Architectural design for a low cost FPGA-based traffic signal detection system in vehicles , 2007, SPIE Microtechnologies.

[32]  Mohammad S. Obaidat,et al.  An online neural network system for computer access security , 1993, IEEE Trans. Ind. Electron..

[33]  Chong Ho Lee,et al.  Hardware implementation of neural network with expansible and reconfigurable architecture , 2002, Proceedings of the 9th International Conference on Neural Information Processing, 2002. ICONIP '02..

[34]  Lutz Priese,et al.  Ideogram identification in a realtime traffic sign recognition system , 1995, Proceedings of the Intelligent Vehicles '95. Symposium.

[35]  Alberto Prieto,et al.  Design and evaluation of a reconfigurable digital architecture for self-organizing maps , 1999, Proceedings of the Seventh International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems.

[36]  Luis Moreno,et al.  Road traffic sign detection and classification , 1997, IEEE Trans. Ind. Electron..

[37]  Zsombor Paroczi,et al.  Real-time traffic sign recognition system , 2011, 2011 2nd International Conference on Cognitive Infocommunications (CogInfoCom).

[38]  W. Ritter,et al.  A real-time traffic sign recognition system , 1994, Proceedings of the Intelligent Vehicles '94 Symposium.

[39]  Kevin Barraclough,et al.  I and i , 2001, BMJ : British Medical Journal.

[40]  Eduardo de la Torre,et al.  Partial Reconfiguration for Core Reallocation and Flexible Communications , 2006, ReCoSoC.

[41]  Heng-Ming Tai,et al.  A neural network-based tracking control system , 1992, IEEE Trans. Ind. Electron..