Next Generation Design of a Frequency Data Recorder Using Field Programmable Gate Arrays

The Frequency Disturbance Recorder (FDR) is a specialized data acquisition device designed to monitor fluctuations in the overall power system. The device is designed such that it can be attached by way of a standard wall power outlet to the power system. These devices then transmit their calculated frequency data through the public internet to a centralized data management and storage server. By distributing a number of these identical systems throughout the three major North American power systems, Virginia Tech has created a Frequency Monitoring Network (FNET). The FNET is composed of these distributed FDRs as well as an Information Management Server (IMS). Since frequency information can be used in many areas of power system analysis, operation and control, there are a great number of end uses for the information provided by the FNET system. The data provides researchers and other users with the information to make frequency analyses and comparisons for the overall power system. Prior to the end of 2004, the FNET system was made a reality, and a number of FDRs were placed strategically throughout the United States. The purpose of this thesis is to present the elements of a new generation of FDR hardware design. These elements will enable the design to be more flexible and to lower reliance on some vendor specific components. Additionally, these enhancements will offload most of the computational processing required of the system to a commodity PC rather than an embedded system solution that is costly in both development time and financial cost. These goals will be accomplished by using a Field Programmable Gate Array (FPGA), a commodity off-the-shelf personal computer, and a new overall system design.

[1]  P. Girard,et al.  Measurement of Bus Voltage Angle Between Montreal and SEPT-ILES , 1980, IEEE Transactions on Power Apparatus and Systems.

[2]  Takuhei Hashiguchi,et al.  Analysis of power system dynamics based on multiple synchronized phasor measurements , 2003, 2003 IEEE Power Engineering Society General Meeting (IEEE Cat. No.03CH37491).

[3]  P. Bonanomi.  Phase Angle Measurements with Synchronized Clocks-Principle and Applications , 1981, IEEE Transactions on Power Apparatus and Systems.

[4]  J. Thorp,et al.  A New Measurement Technique for Tracking Voltage Phasors, Local System Frequency, and Rate of Change of Frequency , 1983, IEEE Transactions on Power Apparatus and Systems.

[5]  Jian Chen,et al.  Accurate frequency estimation with phasor angles , 1994 .

[6]  T. W. Cease,et al.  Synchronized phasor measurements of a power system event , 1994 .

[7]  Thomas A. Clark,et al.  CRITICAL EVALUATION OF THE MOTOROLA M12+ GPS TIMING RECEIVER VS. THE MASTER CLOCK AT THE UNITED STATES NAVAL OBSERVATORY, WASHINGTON, DC , 2000 .

[8]  P J Mumford.  RELATIVE TIMING CHARACTERISTICS OF THE ONE PULSE PER SECOND (1PPS) OUTPUT PULSE OF THREE GPS RECEIVERS , 2003 .

[9]  Arun G. Phadke,et al.  Synchronized phasor measurements-a historical overview , 2002, IEEE/PES Transmission and Distribution Conference and Exhibition.

[10]  A.G. Phadke,et al.  Power system frequency monitoring network (FNET) implementation , 2005, IEEE Transactions on Power Systems.

[11]  A.G. Phadke,et al.  Synchronized phasor measurements in power systems , 1993, IEEE Computer Applications in Power.