Electrical measurement and analysis of TSV/RDL for 3D integration

In this paper, electrical measurement and analysis of TSV/RDL is carried out, to evaluate the fabrication process and get a comprehensive understanding of electrical properties of TSV/RDL interconnect structures. DC resistance, leakage current and high frequency characterization are implemented. TSV shows a spreading distribution of DC resistance, with minimum of 4.3 mΩ. Leakage current of TSV reaches 150nA up to 30V without breakdown. Low substrate resistivity lowers the high frequency performance of TSV.

[1]  Katsuyuki Sakuma,et al.  Three-dimensional silicon integration , 2008, IBM J. Res. Dev..

[2]  Cheolbok Kim,et al.  High frequency characterization and analytical modeling of through glass via (TGV) for 3D thin-film interposer and MEMS packaging , 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

[3]  Z. Rahman,et al.  Architectural implications and process development of 3-D VLSI Z-axis interconnects using through silicon vias , 2005, IEEE Transactions on Advanced Packaging.

[4]  S. Pozder,et al.  Progress of 3D Integration Technologies and 3D Interconnects , 2007, 2007 IEEE International Interconnect Technology Conferencee.

[5]  Kenichi Okada,et al.  Evaluation of a multi-line de-embedding technique for millimeter-wave CMOS circuit design , 2010, 2010 Asia-Pacific Microwave Conference.

[6]  Guo-Wei Huang,et al.  An extended de-embedding method for on-wafer components , 2012, 2012 IEEE International Conference on Microelectronic Test Structures.

[7]  E. Jan Vardaman.  3D IC infrastructure status and issues , 2010, 3rd Electronics System Integration Technology Conference ESTC.

[8]  P. Soussan,et al.  Ar Implantation, a Passivation Technique for High-Resistivity Silicon within the MCM-D Technology , 2006, 2006 European Microwave Integrated Circuits Conference.