论文信息 - Analog maximum, median and minimum circuit

Analog maximum, median and minimum circuit

In this paper, we present a new analog maximum, median and minimum circuit with a new preamplifier. This circuit can be used for sorting multiple-input analog signals. The median circuit has been implemented in a 0.8 /spl mu/m single-poly double-metal (SPDM) CMOS process. The measured output error of this median circuit is less than 2.5 mV. Its frequency response can be up to 1 MHz. The maximum and minimum circuit are also verified by simulation. The experimental and simulation results confirm with the theoretical analysis.

Shen-Iuan Liu | Jenn-Gwo Hwu | Poki Chen | Chin-Yang Chen

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