A 64-Gb/s 1.4-pJ/b NRZ Optical Receiver Data-Path in 14-nm CMOS FinFET

A 64-Gb/s high-sensitivity non-return to zero receiver (RX) data-path is demonstrated in the 14-nm-bulk FinFET CMOS technology. To achieve high sensitivity, the RX incorporates a transimpedance amplifier whose gain and bandwidth are co-optimized with a 1-tap decision feedback equalization (DFE). The DFE, which operates at quarter-rate, features a look-ahead speculation to relax DFE timing to 4 unit-interval. The analog front end includes a transadmittance transimpedance inductorless variable gain amplifier, resulting in a low power and compact front end. The RX, wirebonded to a discrete GaAs photodiode, achieves an energy efficiency of 1.4 pJ/bit and −5-dBm optical modulation amplitude while recovering PRBS-7 data (bit-error-rate <inline-formula> <tex-math notation="LaTeX">$<10^{-12}$ </tex-math></inline-formula>) modulated by a VCSEL driver with a 2-tap feed forward equalization (FFE) (main + precursor) over 7 m of graded-index 50/125-<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> multimode fiber. The measured sensitivities at 56 and 32 Gb/s are −9- and −13-dBm optical modulation amplitude, respectively.

[1]  Alexander V. Rylyakov,et al.  Exploring the limits of high-speed receivers for multimode VCSEL-based optical links , 2014, OFC 2014.

[2]  M.E. Ali,et al.  Direct integration of dense parallel optical interconnects on a first level package for high-end servers , 2005, Proceedings Electronic Components and Technology, 2005. ECTC '05..

[3]  Michael Frueh,et al.  Design Of Integrated Circuits For Optical Communications , 2016 .

[4]  Paul R. Gray,et al.  A 10 b, 20 Msample/s, 35 mW pipeline A/D converter , 1995, IEEE J. Solid State Circuits.

[5]  Cheng Li,et al.  25Gb/s hybrid-integrated silicon photonic receiver with microring wavelength stabilization , 2015, 2015 Optical Fiber Communications Conference and Exhibition (OFC).

[6]  Behzad Razavi Design of intergrated circuits for optical communications , 2002 .

[7]  Woo-Seop Kim,et al.  A 20-gb/s 256-mb DRAM with an inductorless quadrature PLL and a cascaded pre-emphasis transmitter , 2006 .

[8]  Ashok V. Krishnamoorthy,et al.  10-Gbps, 5.3-mW Optical Transmitter and Receiver Circuits in 40-nm CMOS , 2012, IEEE Journal of Solid-State Circuits.

[9]  E. M. Cherry,et al.  The Design of Wide-Band Transistor Feedback Amplifiers , 1963 .

[10]  Daniel Friedman,et al.  A 19Gb/s 38mW 1-tap speculative DFE receiver in 90nm CMOS , 2009, 2009 Symposium on VLSI Circuits.

[11]  C. Schow,et al.  A 71-Gb/s NRZ Modulated 850-nm VCSEL-Based Optical Link , 2015, IEEE Photonics Technology Letters.

[12]  Keshab K. Parhi Design of multigigabit multiplexer-loop-based decision feedback equalizers , 2005, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[13]  Alexander V. Rylyakov,et al.  Optical receivers using DFE-IIR equalization , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

[14]  Azita Emami-Neyestanak,et al.  A 24-Gb/s Double-Sampling Receiver for Ultra-Low-Power Optical Communication , 2013, IEEE Journal of Solid-State Circuits.

[15]  Thomas Toifl,et al.  23.6 A 30Gb/s 0.8pJ/b 14nm FinFET receiver data-path , 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).

[16]  Mounir Meghelli,et al.  22.1 A 25Gb/s burst-mode receiver for rapidly reconfigurable optical networks , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

[17]  Anthony Chan Carusone,et al.  A 20 Gb/s CMOS Optical Receiver With Limited-Bandwidth Front End and Local Feedback IIR-DFE , 2016, IEEE J. Solid State Circuits.

[18]  Anthony Chan Carusone,et al.  Low-power CMOS receivers for short reach optical communication , 2017, 2017 IEEE Custom Integrated Circuits Conference (CICC).

[19]  Yoshiyasu Doi,et al.  A 56-Gb/s receiver front-end with a CTLE and 1-tap DFE in 20-nm CMOS , 2014, 2014 Symposium on VLSI Circuits Digest of Technical Papers.

[20]  Saman Saeedi,et al.  A 25Gb/s 170μW/Gb/s optical receiver in 28nm CMOS for chip-to-chip optical communication , 2014, 2014 IEEE Radio Frequency Integrated Circuits Symposium.