A fully analytical MOS transistor model dedicated to the design and analysis of low-voltage, low-current analog circuits is presented. All the large- and small-signal variables, namely the currents, the transconductances, the intrinsic capacitances, the non-quasi-static transadmittances and the thermal noise are continuous in all regions of operation, including weak inversion, moderate inversion, strong inversion, conduction and saturation. The same approach is used to derive all the equations of the model: the weak and strong inversion asymptotes are first derived, then the variables of interest are normalized and linked using an appropriate interpolation function. The model exploits the inherent symmetry of the device by referring all the voltages to the local substrate. It is shown that the inversion chargeQinv′ is controlled by the voltage differenceVP − Vch, whereVch is the channel voltage, defined as the difference between the quasi-Fermi potentials of the carriers. The pinch-off voltageVP is defined as the particular value ofVch such that the inversion charge is zero for a given gate voltage. It depends only on the gate voltage and can be interpreted as the equivalent effect of the gate voltage referred to the channel. The various modes of operation of the transistor are then presented in terms of voltagesVP − VS andVP − VD. Using the charge sheet model with the assumption of constant doping in the channel, the drain currentID is derived and expressed as the difference between a forward componentIF and a reverse componentIR. Each of these is proportional to a function ofVP − VS, respectivelyVP − VD, through a specific currentIS. This function is exponential in weak inversion and quadratic in strong inversion. The current in the moderate inversion region is then modelled by using an appropriate interpolation function resulting in a continuous expression valid from weak to strong inversion. A quasi-static small-signal model including the transconductances and the intrinsic capacitances is obtained from an accurate evaluation of the total charges stored on the gate and in the channel. The transconductances and the intrinsic capacitances are modelled in moderate inversion using the same interpolation function and without any additional parameters. This small-signal model is then extended to higher frequencies by replacing the transconductances by first order transadmittances obtained from a non-quasi-static calculation. All these transadmittances have the same characteristic time constant which depends on the bias condition in a continuous manner. To complete the model, a general expression for the thermal noise valid in all regions of operation is derived. This model has been successfully implemented in several computer simulation programs and has only 9 physical parameters, 3 fine tuning fitting coefficients and 2 additional temperature parameters.
[1]
C. Sah,et al.
Effects of diffusion current on characteristics of metal-oxide (insulator)-semiconductor transistors☆
,
1966
.
[2]
Edward S. Yang.
Turn-off characteristics of p-n-p-n devices
,
1967
.
[3]
Mohammed S. Ghausi,et al.
Introduction to distributed-parameter networks: With application to integrated circuits
,
1977
.
[4]
Jean-Daniel Chatelain.
Dispositifs à semiconducteur
,
1979
.
[5]
Y. Tsividis.
Relation between incremental intrinsic capacitances and transconductances in MOS transistors
,
1980,
IEEE Transactions on Electron Devices.
[6]
E. Vittoz.
MOS transistors operated in the lateral bipolar mode and their application in CMOS technology
,
1983,
IEEE Journal of Solid-State Circuits.
[7]
P. R. Gray,et al.
High-frequency CMOS continuous-time filters
,
1984
.
[8]
R. C. Foss,et al.
An Efficient MOS Transistor Model for Computer-Aided Design
,
1984,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[9]
Y. Tsividis,et al.
A small signal dc-to-high-frequency nonquasistatic model for the four-terminal MOSFET valid in all regions of operation
,
1985,
IEEE Transactions on Electron Devices.
[10]
Bing J. Sheu,et al.
BSIM: Berkeley short-channel IGFET model for MOS transistors
,
1987
.
[11]
N. D. Arora,et al.
Semi-empirical model for the threshold voltage of a double implanted MOSFET and its temperature dependence
,
1987
.
[12]
N. D. Arora,et al.
Mosfet Modeling for Circuit Simulation
,
1989
.
[13]
H. Wallinga,et al.
Design and analysis of CMOS analog signal processing circuits by means of a graphical MOST model
,
1989
.
[14]
Christian-Charles Enz,et al.
High precision CMOS micropower amplifiers
,
1989
.
[15]
W. Budde,et al.
A charge-sheet capacitance model based on drain current modeling
,
1990
.
[16]
W. A. Lane,et al.
An enhanced SPICE MOSFET model suitable for analog applications
,
1992,
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[17]
C. Mead,et al.
White noise in MOS transistors and resistors
,
1993,
IEEE Circuits and Devices Magazine.
[18]
K. Suyama,et al.
MOSFET modeling for analog circuit CAD: Problems and prospects
,
1993,
Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.
[19]
Robert G. Meyer,et al.
Analysis and Design of Analog Integrated Circuits
,
1993
.
[20]
Eric A. Vittoz,et al.
Micropower Techniques
,
1994
.