Hierarchical BSG floorplan for hierarchical VLSI circuit design

As a hierarchical layout design method that can handle hierarchical designs of large-scale integrated circuits, the BSG method, one of the general structural layout methods, is hierarchical and has evolved as a layout method including interconnections. It is the objective of this paper to construct a design system that will provide feedback as a guideline for circuit design modification in which the layers in the circuit design are faithfully represented and are evaluated from the point of view of layout, and the placement is reconstructed for optimization. Hierarchical BSG is realized by combining smaller BSGs (elemental BSGs) with root trees. The size, number, and hierarchical trees of BSGs can be specified by the designer. An experiment to demonstrate the hierarchical effect is carried out by artificially setting a hierarchical design environment with a combination of several thousands of cells. Performance competitive with that without a hierarchical approach is obtained in the resultant areas and interconnect lengths. As a layout algorithm, the number of rectangles to be treated is increased by one order of magnitude so that several tens of thousands of rectangles can be placed with high quality. © 2001 Scripta Technica, Electron Comm Jpn Pt 3, 85(3): 12–21, 2002