A 1.4V, 2.4/5 GHz, 90nm CMOS system in a package transceiver for next generation WLAN
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K. Soumyanath | Y. Palaskas | H. Lakdawala | G. Banerjee | S.S. Taylor | L.M. Franca-Neto | R.E. Bishop | B.R. Carlton | M.A. Elmala | R.B. Nicholls | A. Ravi | I.A. Rippke
[1] Domine M. W. Leenaerts,et al. A 2.4-GHz 0.18-/spl mu/m CMOS self-biased cascode power amplifier , 2003 .
[2] David J. Allstot,et al. Desensitized design of MOS low noise amplifiers by R/sub n/ minimization , 2004, Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004..
[3] Ashoke Ravi,et al. 8 GHz, 20mW, fast locking, fractional-N frequency synthesizer with optimized 3/sup rd/ order, 3/5-bit IIR and 3/sup rd/ order 3-bit-FIR noise shapers in 90nm CMOS , 2004, Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat. No.04CH37571).
[4] T. Kwan,et al. An adaptive analog continuous-time CMOS biquadratic filter , 1991, Proceedings of the IEEE 1991 Custom Integrated Circuits Conference.
[5] James K. Cavers. A fast method for adaptation of quadrature modulators and demodulators in amplifier linearization circuits , 1996 .
[6] Behzad Razavi,et al. A 5-GHz direct-conversion CMOS transceiver , 2003 .
[7] A. Murthy,et al. A 90 nm communication technology featuring SiGe HBT transistors, RF CMOS, precision R-L-C RF elements and 1 /spl mu/m2 6-T SRAM cell , 2002, Digest. International Electron Devices Meeting,.