FCCMs and the memory wall

Although there has been considerable work in the conventional general purpose processors community on how to tackle an important looming problem, we are not aware of any similar effort for custom computing machines. The aim of this paper is to analyze the state of the art, pose the relevant questions, and indicate a preliminary solution vis a vis the following question: how will custom computing machines face the memory wall.

[1]  Florent de Dinechin The Price of Routing in FPGAs , 2000, J. Univers. Comput. Sci..

[2]  D. Burger,et al.  Memory Bandwidth Limitations of Future Microprocessors , 1996, 23rd Annual International Symposium on Computer Architecture (ISCA'96).

[3]  André DeHon,et al.  Reconfigurable architectures for general-purpose computing , 1996 .

[4]  Mark Shand,et al.  Programmable active memories: reconfigurable systems come of age , 1996, IEEE Trans. Very Large Scale Integr. Syst..

[5]  Susmita Sur-Kolay,et al.  Optimal partitioning for FPGA based regular array implementations , 2000, Proceedings International Conference on Parallel Computing in Electrical Engineering. PARELEC 2000.

[6]  D. Burger,et al.  Billion-Transistor Architectures , 1997, Computer.