Dual-Buffer-Based Optical Datacenter Switch Design

The unbounded growth of Cloud-based services and Internet-of-Things (IoT) using Software Defined Networking (SDN) has resulted in bandwidth requirements that have grown enormously over the years. To meet this exponential growth that is currently outpacing Moore’s Law, we need Optical Interconnection Networks (OIN) that can satisfy the user’s requirements. In a similar direction Arrayed Waveguide Gratings (AWG)-based optical interconnects have been heavily investigated in past and many switch designs have emerged over the period of time. This paper proposes a dual-buffer-based optical switch design where the primary buffer stores the contending packets, while the secondary input buffer stores the contending packets which are blocked by AWG for one slot duration only. Moreover, if a blocked packet is generated on the same node then All-Optical Negative Acknowledgement (AO-NACK) will be used for blocked packets. This paper investigates the various issues related to storage of blocked packets, the analysis is done both at physical and network layers in terms of bit error rate (BER) and packet loss probability, respectively. It is found that with proposed switch design BER is 10 times lower than the earlier design, and the number of re-transmitted packets at the load of 0.8, reduces to 26 from 32 as in earlier switch design.