A Robust High-Performance GPS L1 Receiver with Single-stage Quadrature Redio-Frequency Circuit

A low power current reuse single-stage quadrature raido-frequency part (SQRF) is proposed for GPS L1 receiver in 180nm CMOS process. The proposed circuit consists of LNA, Mixer, QVCO, is called the QLMV cell. A two blocks stacked topology is adopted in this design. The parallel QVCO and mixer placed on the top forms the upper stacked block, and the LNA placed on the bottom forms the other stacked block. The two blocks share the current and achieve low power performance. To improve the stability, a float current source is proposed. The float current isolated the local oscillation signal and the input RF signal, which bring the whole circuit robust high-performance. The result shows conversion gain is 34 dB, noise figure is three dB, the phase noise is -110 dBc/Hz at 1MHz and IIP3 is -20 dBm. The proposed circuit dissipated 1.7mW with 1 V supply voltage.