A 0.3–1.2 V Schottky-Based CMOS ZTC Voltage Reference

A voltage reference based on MOSFETs operated under Zero Temperature Coefficient (ZTC) bias is proposed. The circuit operates in a power supply voltage range from 0.3 V up to 1.2 V and outputs three different reference voltages using Standard-<inline-formula> <tex-math notation="LaTeX">$V_{T}$ </tex-math></inline-formula> (SVT), Low-<inline-formula> <tex-math notation="LaTeX">$V_{T}$ </tex-math></inline-formula> (LVT), and Zero-<inline-formula> <tex-math notation="LaTeX">$V_{T}$ </tex-math></inline-formula> (ZVT) MOS transistors biased near their ZTC point by a single PTAT current reference. Measurements on 15 circuit samples fabricated in a standard 0.13-<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS process show a worst-case normalized standard deviation <inline-formula> <tex-math notation="LaTeX">$(\sigma /\mu)$ </tex-math></inline-formula> of 3% (SVT), 5.1% (LVT) and 10.8% (ZVT) respectively with a 75% of confidence level. At the nominal supply voltage of 0.45 V, the measured effective temperature coefficients (TC<sub>eff</sub>) range from 140 to 200 ppm/°C over the full commercial temperature range. At room temperature (25 °C), line sensitivity in the ZVT VR is just 1.3%/100 mV, over the whole supply range. The proposed reference draws around 5 <inline-formula> <tex-math notation="LaTeX">$\mu \text{W}$ </tex-math></inline-formula> and occupies 0.014 mm<sup>2</sup> of silicon area.

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