Image reconstruction for Computed Tomography (CT) is a time consuming operation on current uniprocessor computers and even on array processors. This is particularly true for three-dimensional data sets or for limited-data reconstructions requiring iterative procedures. In these cases, the projection operation (Radon transform) and its inverse (filtered back-projection) are major computational tasks that are performed many times. Multiprocessor computers, especially in systolic array configurations, can provide dramatic improvements in reconstruction times at reasonable costs. An in-house systolic processor, called SPRINT, has been programmed to demonstrate these improved speeds while achieving near 100% efficiency of all processor elements. We report on these results in this paper. In addition, two proposed hardware implementations of a new architecture are shown to have even greater speedup possibilities. One, using standard DSP chips, has been simulated to give a factor of three improvement over SPRINT, while the other, using custom VLSI that is now in the early stages of design, could potentially perform 512/sup 2/ reconstructions at video rates (100 times further speedup). These processors are also interconnected in a systolic array configuration. Experimental and projected results, with future plans, are also reported in this paper. 11 refs., 5 figs., 1 tab.