An Electrical-Stimulus-Only BIST IC for Capacitive MEMS Accelerometer Sensitivity Characterization

Testing and calibration constitute a major part of the overall manufacturing cost of microelectromechanical system (MEMS) devices. A physical-stimulus-free built-in-self-test (BIST) integrated circuit (IC) design characterizing the sensitivity of capacitive MEMS accelerometers is presented. The BIST circuitry can extract the amplitude and phase response of the acceleration sensor’s mechanics under electrical excitation within 0.55% of error with respect to its mechanical sensitivity under physical stimulus. Sensitivity characterization is performed using a low computational complexity multi-variate linear regression model. The BIST circuitry maximizes the use of existing analog and mixed signal readout signal chain and the host processor core, without the need for computationally expensive fast Fourier transform (FFT)-based approaches. The BIST IC is designed and fabricated using the 0.18-<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS technology. The sensor analog front-end and BIST circuitry is integrated with a three axis, low-<inline-formula> <tex-math notation="LaTeX">$g$ </tex-math></inline-formula> capacitive MEMS accelerometer in a single hermetically sealed package. The BIST circuitry occupies 0.3 mm<inline-formula> <tex-math notation="LaTeX">$^{ { {2}}}$ </tex-math></inline-formula> with a total readout IC area of 1 mm<inline-formula> <tex-math notation="LaTeX">$^{ { {2}}}$ </tex-math></inline-formula>, and consumes 8.9 mW during self-test operation.

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