A 1-μW 600-ppm/◦C Current Reference Circuit Consisting of Subthreshold CMOS Circuits

A low-power CMOS current reference circuit was developed using a 0.35-μm standard CMOS process technology. The circuit consists of MOSFET circuits operating in the subthreshold region and uses no resistors. It compensates for the temperature effect on mobility μ and threshold voltage VTH of MOSFETs and generates a reference current that is insensitive to temperature and supply voltage. Theoretical analyses and experimental results showed that the circuit generates a stable reference current of 100 nA. The temperature coefficient of the current was 520 ppm/◦C at best and 600 ppm/◦C on average in the range of 0 ◦C–80 ◦C. The line regulation was 0.2%/V in a supply voltage range of 1.8–3 V. The power dissipation was 1 μW, and the chip area was 0.015 mm. Our circuit would be suitable for use in subthreshold-operated power-aware large-scale integrations.

[1]  H. Grubin.  The physics of semiconductor devices , 1979, IEEE Journal of Quantum Electronics.

[2]  Bing J. Sheu,et al.  Inverse-Geometry Dependence of MOS Transistor Electrical Parameters , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[3]  Marcel J. M. Pelgrom,et al.  Matching properties of MOS transistors , 1989 .

[4]  C.-H. Lee,et al.  All-CMOS temperature independent current reference , 1996 .

[5]  H. Oguey,et al.  CMOS Current Reference without Resistance , 1996, ESSCIRC '96: Proceedings of the 22nd European Solid-State Circuits Conference.

[6]  Mansun Chan,et al.  A physical and scalable I-V model in BSIM3v3 for analog/digital circuit simulation , 1997 .

[7]  A. Hastings.  The Art of Analog Layout , 2000 .

[8]  I. Filanovsky,et al.  Mutual compensation of mobility and threshold voltage temperature effects with applications in CMOS circuits , 2001 .

[9]  James D. Meindl,et al.  Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration , 2002, IEEE J. Solid State Circuits.

[10]  Carlos Galup-Montoro,et al.  A 2-nW 1.1-V self-biased current reference in CMOS technology , 2005, IEEE Transactions on Circuits and Systems II: Express Briefs.

[11]  Hidetoshi Onodera.  Variability: Modeling and Its Impact on Design , 2006, IEICE Trans. Electron..

[12]  Anantha Chandrakasan,et al.  Sub-threshold Design for Ultra Low-Power Systems , 2006, Series on Integrated Circuits and Systems.

[13]  T. Asai,et al.  CMOS Smart Sensor for Monitoring the Quality of Perishables , 2007, IEEE Journal of Solid-State Circuits.

[14]  Micropower energy scavenging , 2008, ESSDERC 2008 - 38th European Solid-State Device Research Conference.

[15]  Tetsuya Asai,et al.  Current Reference Circuit for Subthreshold CMOS LSIs , 2008 .

[16]  A.P. Chandrakasan,et al.  Next generation micro-power systems , 2008, 2008 IEEE Symposium on VLSI Circuits.

[17]  Y. Amemiya,et al.  A 300 nW, 15 ppm/$^{\circ}$C, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETs , 2009, IEEE Journal of Solid-State Circuits.