New custom computing machine dedicated to fast dynamic configuration applications

This paper presents a new custom computing machine (CCM) which combines a RISC core processor with rapidly reconfigurable FPGA, more closely than in any of the currently available custom computing machines, by a highly efficient flexible interface. The pyramidal architecture reconfigurable (PARC) resources are characterized by a fine-grained array of optimized logic blocks and hierarchical routing resources which can be totally configured in as short time as 25 /spl mu/sec. The new RISC core processor is dedicated to fast dynamic configuration systems; it uses a reduced instruction set, hardware and software interrupts, etc. The interface provides to the PARC-FPGA the current state of the processor and allows the RISC processor direct access to the routing resources. It also provides direct programmable access between the PARC-FPGA and the RISC processor bank registers. This interface facilitates the sharing of hardware or software functions by the RISC core processor, and the reconfigurable logic resources. The circuit was designed using Synopsys (CAD) tools, VHDL hardware description language, and the 0.8 /spl mu/m BiCMOS technology, to operate with a 40 MHz clock frequency.