Ahstroc? -The stabilized reference-line (SRL) technique, offering the reduction of bit-line interference noise, is described. This technique can eliminate the capacitance coupling noise generated when the cell data are transferred to the bit line. As a result, the noise generated by sensing timing difference, which is caused by the coupling noise, does not arise. Furthermore, the SRL technique can be realized by modifying the conventional folded bit-line architecture. Therefore, it is easy to apply the SRL technique to high-density DRAM’s. A test chip using the SRL technique was designed and fabricated, and sufficient noiw reduction effects have been achieved. The most advantageous point of the SRL technique is that the bit-line interference noise does not increase with the scaling down of the bit-line pitch. Therefore, the SRL technique has been demonstrated to be a promising technique for high-density DRAM’s.