Increasing the ESD protection capability of over-voltage NMOS structures by comb-ballasting region design

The objective of this study is to find a generic design solution for the cascoded snapback NMOS that delivers robust operation and eliminates the requirement for an additional ESD implant. In addition, the research goal of this study is to understand the physical failure mechanism, taking into account the non-linear effects of NMOS snapback, and to provide, at a minimum, a phenomenological explanation of the observed trends resulting from the analysis of Si based experiments.

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