Automatic generation of hierarchical placement rules for analog integrated circuits

This paper presents a new method to automatically generate hierarchical placement rules, which are crucial for a successful analog placement. The netlist, a library of building blocks and a symmetry analysis are the basis to determine a constraint requirement graph, which comprises five types of proximity, matching and symmetry constraints. According to the priority of the constraint types, a hierarchical partitioning of the circuit into matching, proximity and symmetry groups is then automatically computed and forwarded to a state-of-the-art placement tool. Based on experimental results, we show that the new approach generates more placement rules and leads to better circuit performances according to post-layout simulation compared to a commercial approach.

[1]  Alberto L. Sangiovanni-Vincentelli,et al.  Automatic generation of parasitic constraints for performance-constrained physical design of analog circuits , 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[2]  Yao-Wen Chang,et al.  Analog Placement Based on Symmetry-Island Formulation , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[3]  Alberto L. Sangiovanni-Vincentelli,et al.  Automation of IC layout with analog constraints , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[4]  P. Malcovati,et al.  40 MHz IF 1 MHz Bandwidth Two-Path Bandpass ΣΔ Modulator With 72 dB DR Consuming 16 mW , 2008, IEEE Journal of Solid-State Circuits.

[5]  J. Fisher,et al.  A Highly Linear CMOS Buffer Amplifier , 1987, ESSCIRC '86: Twelfth European Solid-State Circuits Conference.

[6]  Frank Harary,et al.  Graph Theory , 2016 .

[7]  Ulf Schlichtmann,et al.  The Sizing Rules Method for CMOS and Bipolar Analog Integrated Circuit Synthesis , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[8]  Kenneth R. Laker,et al.  Design of analog integrated circuits and systems , 1994 .

[9]  B. J. Sheu,et al.  Generalised approach to automatic custom layout of analogue ICs , 1992 .

[10]  E. Charbon,et al.  Generalized constraint generation for analog circuit design , 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).

[11]  Ulf Schlichtmann,et al.  Deterministic analog circuit placement using hierarchically bounded enumeration and enhanced shape functions , 2008, 2008 IEEE/ACM International Conference on Computer-Aided Design.

[12]  Bogdan G. Arsintescu,et al.  A method for analog circuits visualization , 1996, Proceedings International Conference on Computer Design. VLSI in Computers and Processors.

[13]  John M. Cohn.  Analog Device-Level Layout Automation , 1994 .

[14]  A. Hastings.  The Art of Analog Layout , 2000 .

[15]  Brian Everitt,et al.  Cluster analysis , 1974 .

[16]  Rob A. Rutenbar,et al.  Automatic Generation of Parasitic Constraints for PerformanceConstrained Physical Design of Analog Circuits , 2002 .

[17]  Jens Lienig,et al.  Constraint-driven design: the next step towards analog design automation , 2009, ISPD '09.

[18]  O. E. Herrmann,et al.  Modeling symmetry in analog electronic circuits , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.