A superposable silicon synapse with programmable reversal potential

We present a novel log-domain silicon synapse designed for subthreshold analog operation that emulates common synaptic interactions found in biology. Our circuit models the dynamic gating of ion-channel conductances by emulating the processes of neurotransmitter release-reuptake and receptor binding-unbinding in a superposable fashion: Only a single circuit is required to model the entire population of synapses (of a given type) that a biological neuron receives. Unlike previous designs, which are strictly excitatory or inhibitory, our silicon synapse implements - for the first time in the log-domain - a programmable reversal potential (i.e., driving force). To demonstrate our design's scalability, we fabricated in 180nm CMOS an array of 64K silicon neurons, each with four independent superposable synapse circuits occupying 11.0×21.5 μm2 apiece. After verifying that these synapses have the predicted effect on the neurons' spike rate, we explored a recurrent network where the synapses' reversal potentials are set near the neurons' threshold, acting as shunts. These shunting synapses synchronized neuronal spiking more robustly than nonshunting synapses, confirming that reversal potentials can have important network-level implications.

[1]  S. Joshi,et al.  Subthreshold MOS dynamic translinear neural and synaptic conductance , 2011, 2011 5th International IEEE/EMBS Conference on Neural Engineering.

[2]  P. Jonas,et al.  Shunting Inhibition Improves Robustness of Gamma Oscillations in Hippocampal Interneuron Networks by Homogenizing Firing Rates , 2006, Neuron.

[3]  Craig T. Jin,et al.  A log-domain implementation of the Izhikevich neuron model , 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

[4]  Bertram E. Shi,et al.  Neuromorphic implementation of orientation hypercolumns , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.

[5]  Terrence J. Sejnowski,et al.  Synthesis of models for excitable membranes, synaptic transmission and neuromodulation using a common kinetic formalism , 1994, Journal of Computational Neuroscience.

[6]  Kwabena Boahen,et al.  Synchrony in Silicon: The Gamma Rhythm , 2007, IEEE Transactions on Neural Networks.

[7]  G. Edelman,et al.  Large-scale model of mammalian thalamocortical systems , 2008, Proceedings of the National Academy of Sciences.

[8]  Kwabena Boahen,et al.  Dynamical System Guided Mapping of Quantitative Neuronal Models Onto Neuromorphic Hardware , 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

[9]  Kwabena Boahen,et al.  Silicon-Neuron Design: A Dynamical Systems Approach , 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

[10]  Carver Mead,et al.  Analog VLSI and neural systems , 1989 .

[11]  Chiara Bartolozzi,et al.  Synaptic Dynamics in Analog VLSI , 2007, Neural Computation.

[12]  Timothy K. Horiuchi,et al.  A Summating, Exponentially-Decaying CMOS Synapse for Spiking Neural Systems , 2003, NIPS.

[13]  Gert Cauwenberghs,et al.  A Multichip Neuromorphic System for Spike-Based Visual Information Processing , 2007, Neural Computation.

[14]  Johannes Schemmel,et al.  A wafer-scale neuromorphic hardware system for large-scale neural modeling , 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

[15]  Gert Cauwenberghs,et al.  A subthreshold aVLSI implementation of the Izhikevich simple neuron model , 2010, 2010 Annual International Conference of the IEEE Engineering in Medicine and Biology.