An Accelerator Chip for Ground-State Searches of the Ising Model with Asynchronous Random Pulse Distribution

We developed an SRAM-based CMOS LSI chip that accelerates ground-state searches of an Ising model. Escaping local minima is a key feature to create such a chip. We describe a novel method to escape the local minima by distributing random pulses asynchronously. The random pulses are input from outside of the chip and propagated through two asynchronous paths. In an experiment using a prototype chip, the method achieved the same solution accuracy as the conventional method. In addition, the solution accuracy was further improved by dividing the random pulse distribution path and by increasing the number of pseudo random number generators (PRNGs).

[1]  F. Barahona On the computational complexity of Ising spin glass models , 1982 .

[2]  Hiroyuki Mizuno,et al.  24.3 20k-spin Ising chip for combinational optimization problem with CMOS annealing , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.

[3]  Aidan Roy,et al.  A practical heuristic for finding graph minors , 2014, ArXiv.

[4]  Hiroyuki Mizuno,et al.  Spatial computing architecture using randomness of memory cell stability under voltage control , 2013, 2013 European Conference on Circuit Theory and Design (ECCTD).

[5]  Scott Kirkpatrick,et al.  Optimization by simulated annealing: Quantitative studies , 1984 .

[6]  K. Hawick,et al.  3 D Lattice Monte Carlo Simulations on FPGAs , 2013 .

[7]  Guy Cohen,et al.  Simulating lattice spin models on GPUs , 2014 .

[8]  Sergiy Butenko,et al.  On greedy construction heuristics for the MAX-CUT problem , 2007, Int. J. Comput. Sci. Eng..

[9]  Jack Edmonds,et al.  Maximum matching and a polyhedron with 0,1-vertices , 1965 .

[10]  Peter Virnau,et al.  Multi-GPU accelerated multi-spin Monte Carlo simulations of the 2D Ising model , 2010, Comput. Phys. Commun..

[11]  G. Rinaldi,et al.  Exact ground states of Ising spin glasses: New experimental results with a branch-and-cut algorithm , 1995 .

[12]  Andrew Lucas,et al.  Ising formulations of many NP problems , 2013, Front. Physics.

[13]  M. W. Johnson,et al.  Quantum annealing with manufactured spins , 2011, Nature.

[14]  Hiroyuki Mizuno,et al.  A 20k-Spin Ising Chip to Solve Combinatorial Optimization Problems With CMOS Annealing , 2016, IEEE Journal of Solid-State Circuits.

[15]  Denis Navarro,et al.  Janus: An FPGA-Based System for High-Performance Scientific Computing , 2007, Computing in Science & Engineering.

[16]  Vicky Choi,et al.  Minor-embedding in adiabatic quantum computation: II. Minor-universal graph design , 2010, Quantum Inf. Process..

[17]  N. Metropolis,et al.  Equation of State Calculations by Fast Computing Machines , 1953, Resonance.

[18]  Yoshihisa Yamamoto,et al.  Mapping of Ising models onto injection-locked laser systems. , 2011, Optics express.

[19]  X. Zheng,et al.  Monte Carlo simulation of the Ising model on FPGA , 2013, J. Comput. Phys..

[20]  Martin Weigel,et al.  Simulating spin models on GPU , 2010, Comput. Phys. Commun..

[21]  C. D. Gelatt,et al.  Optimization by Simulated Annealing , 1983, Science.

[22]  S. Brush History of the Lenz-Ising Model , 1967 .