Efficient Implementation of Image Processing Algorithms on Linear Processor Arrays Using the Data Parallel Language IDC

SIMD linear processor arrays (LPAs) have received a great deal of interest as a suitable parallel architecture for image processing. However, few possess a high level programming environment support, and tlie range of image processing tasks which can be efficiently i~nplenlented is unclear. In this paper, we first describe a data parallel language succinctly designed for a virtual LPA, and also a compiler for an existing LPA. Next, we provide a guideline for pamllel SIMD linear array algorithm developnlent using the language. The guideline is consisted of five hasic parallelizing methods, I>y using which efficient implementations are shown for each category of low to intermediate level image operations. We also suggest that further improvement of performance on LPAs can be acliicvcd, I>y architectural supports for reducing the control overhead of some parallelizing methods.

[1]  S. S. Wilson,et al.  The AIS-5000 Parallel Processor , 1988, IEEE Trans. Pattern Anal. Mach. Intell..

[2]  T. J. Fountain,et al.  The CLIP7A Image Processor , 1988, IEEE Trans. Pattern Anal. Mach. Intell..

[3]  Shin'ichiro Okazaki,et al.  IMAP-VISION: An SIMD Processor with High-Speed On-chip Memory and Large Capacity External Memory , 1996, MVA.

[4]  Joseph JáJá,et al.  Efficient Image Processing Algorithms on the Scan Line Array Processor , 1993, 1993 International Conference on Parallel Processing - ICPP'93.