ABCDPlace: Accelerated Batch-Based Concurrent Detailed Placement on Multithreaded CPUs and GPUs

Placement is an important step in modern very-large-scale integrated (VLSI) designs. Detailed placement is a placement refining procedure intensively called throughout the design flow, thus its efficiency has a vital impact on design closure. However, since most detailed placement techniques are inherently greedy and sequential, they are generally difficult to parallelize. In this article, we present a concurrent detailed placement framework, ABCDPlace, exploiting multithreading and graphic processing unit (GPU) acceleration. We propose batch-based concurrent algorithms for widely adopted sequential detailed placement techniques, such as independent set matching, global swap, and local reordering. The experimental results demonstrate that <italic>ABCDPlace</italic> can achieve <inline-formula> <tex-math notation="LaTeX">$2\times $ </tex-math></inline-formula>–<inline-formula> <tex-math notation="LaTeX">$5\times $ </tex-math></inline-formula> faster runtime than sequential implementations with multithreaded CPU and over <inline-formula> <tex-math notation="LaTeX">$10\times $ </tex-math></inline-formula> with GPU on ISPD 2005 contest benchmarks without quality degradation. On larger industrial benchmarks, we show more than <inline-formula> <tex-math notation="LaTeX">$16\times $ </tex-math></inline-formula> speedup with GPU over the state-of-the-art sequential detailed placer. ABCDPlace finishes the detailed placement of a 10-million-cell industrial design in 1 min.