An integrated countermeasure against differential power analysis for secure smart-cards
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[1] Adi Shamir,et al. Protecting Smart Cards from Passive Power Analysis with Detached Power Supplies , 2000, CHES.
[2] Narayanan Vijaykrishnan,et al. Masking the Energy Behavior of DES Encryption , 2003, DATE.
[3] Catherine H. Gebotys. Security-driven exploration of cryptography in DSP cores , 2002, 15th International Symposium on System Synthesis, 2002..
[4] Catherine H. Gebotys,et al. A framework for security on NoC technologies , 2003, IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings..
[5] M. Anis,et al. "Impact of Technology Scaling on CMOS Logic Styles", IEEE Transactions On Circuits and Systems-II , 2002 .
[6] Luis A. Plana,et al. An investigation into the security of self-timed circuits , 2003, Ninth International Symposium on Asynchronous Circuits and Systems, 2003. Proceedings..
[7] Wei Zhang,et al. Masking the energy behavior of DES encryption [smart cards] , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.
[8] Luca Benini,et al. Energy-aware design techniques for differential power analysis protection , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).
[9] Tim Collins,et al. Secure contactless smartcard ASIC with DPA protection , 2001 .
[10] Ingrid Verbauwhede,et al. Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology , 2003, CHES.
[11] Robert H. Sloan,et al. Examining Smart-Card Security under the Threat of Power Analysis Attacks , 2002, IEEE Trans. Computers.
[12] George S. Taylor,et al. Improving smart card security using self-timed circuits , 2002, Proceedings Eighth International Symposium on Asynchronous Circuits and Systems.