论文信息 - An overview of failure mechanisms in embedded flash memories

An overview of failure mechanisms in embedded flash memories

Non-volatile flash memories are becoming more and more popular for system-on-chip design (SoC). Embedded flash (eFlash) memories are based on the floating-gate transistor concept and can be subject to complex hard defects creating functional faults. Studies of realistic failure mechanisms and their associated fault models are the first mandatory step before providing efficient and practical new test methods. In this paper, we present an analysis made on actual failures occurring in 2T FLOTOX cells of 0.15mum NOR-based embedded flash structure

[1] Piero Olivo,et al. Flash memory cells-an overview , 1997, Proc. IEEE.

[2] Kiyoo Itoh,et al. Vlsi Memory Chip Design , 2006 .

[3] A. J. van de Goor,et al. Testing Semiconductor Memories: Theory and Practice , 1998 .

[4] Tetsuo Endoh,et al. Reliability issues of flash memory cells , 1993, Proc. IEEE.

[5] Kewal K. Saluja,et al. Flash memory disturbances: modeling and test , 2001, Proceedings 19th IEEE VLSI Test Symposium. VTS 2001.

[6] Kewal K. Saluja,et al. Simulating program disturb faults in flash memories using SPICE compatible electrical model , 2003 .

[7] Kewal K. Saluja,et al. Electrical model for program disturb faults in non-volatile memories , 2003, 16th International Conference on VLSI Design, 2003. Proceedings..

[8] D. Schroder,et al. Degradation of thin tunnel gate oxide under constant Fowler-Nordheim current stress for a flash EEPROM , 1998 .

[9] Yea-Ling Horng,et al. A realistic fault model for flash memories , 2000, Proceedings of the Ninth Asian Test Symposium.

[10] Approved June,et al. IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays , 1991 .