Gpnocsim - A General Purpose Simulator for Network-On-Chip
暂无分享,去创建一个
T.Z. Islam | H. Hossain | M. Ahmed | A. Al-Nayeem | M. Akbar
[1] Partha Pratim Pande,et al. Performance evaluation and design trade-offs for network-on-chip interconnect architectures , 2005, IEEE Transactions on Computers.
[2] Axel Jantsch,et al. NNSE: Nostrum Network-on-Chip Simulation Environment , 2005 .
[3] Sudhakar Yalamanchili,et al. Interconnection Networks: An Engineering Approach , 2002 .
[4] Partha Pratim Pande,et al. High-throughput switch-based interconnect for future SoCs , 2003, The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings..
[5] Axel Jantsch,et al. A network on chip architecture and design methodology , 2002, Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002.
[6] Luca Benini,et al. Networks on Chips : A New SoC Paradigm , 2022 .