An ATPG Method for Double Stuck-At Faults by Analyzing Propagation Paths of Single Faults

As fabricated circuitry becomes larger and denser, the modern industrial automatic test pattern generation techniques, which focus on the detection of single faults, become more likely to overlook multiple (simultaneous) faults. Although there are exponentially more multiple faults than single faults in any given circuit design, only a few additional test patterns are needed to cover all of the multiple faults, if the test generation starts from the complete test set for single faults. In this paper, we first show the case where test patterns for single faults are sufficient to cover all multiple faults, and then explain in which conditions some of the multiple faults may be overlooked. Based on this analysis, we propose a method that can efficiently generate the complete test set for double faults without traversing all the faults. Since most of the double faults can be detected by the single faults’ test set, the proposed method only selects the uncovered double faults by analyzing the propagation paths of single faults, and then generating new test patterns only for those uncovered faults. The experimental results show that based on the single faults’ test set, the proposed method only needs to create a small number of additional test patterns to cover all double faults in most of the given circuits. By repeating the same process, the proposed method can be incrementally applied to deal with all multiple faults.

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