The elusive atomic register revisited

A new construction of a l-writer/m-reader/nbit atomic register using O(m2 + mn) lwriter/l-reader/I-bit atomic registers is presented. This construction is more efficient, i.e, uses less registers, than previous constructions.

[1]  Gary L. Peterson,et al.  Concurrent Reading While Writing , 1983, TOPL.

[2]  Baruch Awerbuch,et al.  Atomic shared register access by asynchronous hardware , 1986, 27th Annual Symposium on Foundations of Computer Science (sfcs 1986).

[3]  Jayadev Misra Axioms for memory access in asynchronous hardware systems , 1986, TOPL.

[4]  Gary L. Peterson,et al.  Concurrent reading while writing II: The multi-writer case , 1987, 28th Annual Symposium on Foundations of Computer Science (sfcs 1987).

[5]  Evangelos Kranakis,et al.  Atomic Multireader Register , 1987, WDAG.