A high speed SOI technology with 12 ps/18 ps gate delay operating at 5 V/1.5 V
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Chenming Hu | S. Parke | F. Assaderaghi | P. K. Ko | Jian Chen | J. King
[1] Sorin Cristoloveanu,et al. Detailed analysis of edge effects in SIMOX-MOS transistors , 1992 .
[2] Chenming Hu,et al. A versatile, SOI BiCMOS technology with complementary lateral BJT's , 1992, 1992 International Technical Digest on Electron Devices Meeting.
[3] R. L. Field,et al. Ultra-fast (0.5- mu m) CMOS circuits in fully depleted SOI films , 1992 .
[4] H. Tango,et al. Two-dimensional simulation and measurement of high-performance MOSFETs made on a very thin SOI film , 1989 .
[5] J. Colinge. Silicon-on-Insulator Technology: Materials to VLSI , 1991 .
[6] J. Colinge. Silicon-on-Insulator Technology , 1991 .