Deductive Verification of Modular Systems
暂无分享,去创建一个
[1] Zohar Manna,et al. Temporal verification of reactive systems - safety , 1995 .
[2] Henny B. Sipma,et al. Hierarchical Verification Using Verification Diagrams , 1996, ASIAN.
[3] Henny B. Sipma,et al. STeP: The Stanford Temporal Prover (Educational Release) User''s Manual , 1995 .
[4] Henny B. Sipma,et al. Generalized Temporal Verification Diagrams , 1995, FSTTCS.
[5] Zohar Manna,et al. Clocked Transition Systems , 1996 .
[6] Howard Barringer,et al. Hierarchical Development of Cncurrent Systems in a Temporal Logic Framework , 1984, Seminar on Concurrency.
[7] Zohar Manna,et al. Temporal Verification Diagrams , 1994, TACS.
[8] Nancy A. Lynch,et al. An introduction to input/output automata , 1989 .
[9] Cliff B. Jones,et al. Tentative steps toward a development method for interfering programs , 1983, TOPL.
[10] Stephen J. Garland,et al. Verification of VLSI Circuits Using LP , 1988 .
[11] Zohar Manna,et al. Temporal Verification of Reactive Systems , 1995, Springer New York.
[12] Edward Y. Chang,et al. STeP: Deductive-Algorithmic Verification of Reactive and Real-Time Systems , 1996, CAV.
[13] Nancy A. Lynch,et al. Hierarchical correctness proofs for distributed algorithms , 1987, PODC '87.
[14] Henny B. Sipma,et al. Deductive Verification of Real-Time Systems Using STeP , 1997, ARTS.
[15] Zohar Manna,et al. Temporal Verification of Simulation and Refinement , 1993, REX School/Symposium.
[16] Amir Pnueli,et al. In Transition From Global to Modular Temporal Reasoning about Programs , 1989, Logics and Models of Concurrent Systems.
[17] Martín Abadi,et al. Conjoining specifications , 1995, TOPL.
[18] Edward Y. Chang. Compositional Verification of Reactive and Real-time Systems , 1993 .
[19] Orna Grumberg,et al. Model checking and modular verification , 1994, TOPL.
[20] Jorgen Staunstrup. A formal approach to hardware design , 1994, The Kluwer international series in engineering and computer science.
[21] Bengt Jonsson,et al. Assumption/Guarantee Specifications in Linear-Time Temporal Logic (Extended Abstract) , 1995, TAPSOFT.
[22] Natarajan Shankar,et al. Lazy Compositional Verification , 1997, COMPOS.
[23] Henny B. Sipma,et al. Deductive Model Checking , 1996, CAV.
[24] K. Mani Chandy,et al. Proofs of Networks of Processes , 1981, IEEE Transactions on Software Engineering.
[25] David L. Dill,et al. Trace theory for automatic hierarchical verification of speed-independent circuits , 1989, ACM distinguished dissertations.
[26] Zohar Manna,et al. The Temporal Logic of Reactive and Concurrent Systems , 1991, Springer New York.
[27] Martín Abadi,et al. The Existence of Refinement Mappings , 1988, LICS.