Design of a 20 nm T-Gate MOSFET with a Source/Drain-to-Gate Non-overlapped Structure

eld, resulting in the suppression of the short-channel eects (SCEs). T-gate is used to reduce the gate resistance and to induce more carriers in the non-overlapped region to increase current drivability. The key device characteristics, including internal physics, were investigated by using extensive simulations. Compared to a conventional overlapped structure, the proposed structure has potential for the further scaling down.