A method of fabricating 40‐nm gate‐length n‐metal–oxide–semiconductor field effect transistors (MOSFETs) is described in detail. The fabrication of MOSFETs with gate lengths of this order poses two major problems: how to fabricate such small‐geometry gate electrodes, and how to fabricate the ultrashallow source and drain junctions required. Two special techniques are used to overcome these problems: a resist‐thinning process using isotropic oxygen plasma ashing for the fabrication of the gate electrodes, and a process of solid‐phase diffusion from phosphorus‐doped silicated‐glass gate sidewalls for fabrication of the source and drain junctions. The resulting 40‐nm gate electrodes and ultrashallow 10‐nm junctions have an adequate impurity concentration and have been shown to function successfully. It has been confirmed that these 40‐nm gate‐length n‐MOSFETs have good electrical characteristics at room temperature. Certain details of small‐geometry MOSFET electrical characteristics are studied using these d...