Two Dimensional Analytical Subthreshold Model of Nanoscale Cylindrical Surrounding Gate MOSFET Including Impact of Localised Charges Rajni Gautam1, Manoj Saxena2, R. S. Gupta3, and Mridula Gupta1 ∗ 1Department of Electronic Science, Semiconductor Device Research Laboratory, University of Delhi, South Campus, Benito Juarez Road, New Delhi 110021, India 2Department of Electronics, Deen Dayal Upadhyaya College, University of Delhi, Karampura, New Delhi 110015, India 3Department of Electronics and Communication Engineering, Maharaja Agrasen Institute of Technology, Sector 22, Rohini, New Delhi 110086, India