High frequency noise of MOSFETs I Modeling

Abstract In this paper, a model is proposed which can predict accurately both ac and noise performance (all four noise parameters: minimum noise figure NF min , equivalent noise resistance R n , optimized source resistance R opt and reactance X opt ) of MOSFETs based on s -parameter and noise measurements at microwave frequencies. This model includes the relevant high frequency noise sources (i.e. the channel thermal noise, the induced gate noise and its correlation with the channel thermal noise and the thermal noise from the gate and parasitic resistances). In order to confirm the accuracy of the model and obtain the intrinsic scattering and noise parameters of devices, two de-embedding techniques (probe pad equivalent circuit modeling and direct parasitic noise de-embedding) have been used to de-embed the probe pad parasitics from the measured noise and s -parameters of the device-under-test (DUT). In addition, because of the complexity of this noise model, a direct calculation technique for calculating the four noise parameters was developed based on the small-signal transistor's model. Finally, the impact of gate resistance, and the noise improvement using multi-finger gate design are investigated.

[1]  M. J. Deen,et al.  A new method for measuring the threshold voltage of small-geometry MOSFETs from subthreshold conduction , 1990 .

[2]  K. F. Lee,et al.  Impact of distributed gate resistance on the performance of MOS devices , 1994 .

[3]  David H. Schrader.  Microstrip Circuit Analysis , 1995 .

[4]  J. A. Geurst.  Calculation of high-frequency characteristics of thin-film transistors , 1965 .

[5]  A. Ziel.  Noise in solid state devices and circuits , 1986 .

[6]  J. A. Geurst.  Calculation of high-frequency characteristics of field-effect transistors , 1965 .

[7]  Robert Fox.  Comments on circuit models for MOSFET thermal noise , 1993 .

[8]  S. P. Voinigescu,et al.  An assessment of the state-of-the-art 0.5 /spl mu/m bulk CMOS technology for RF applications , 1995, Proceedings of International Electron Devices Meeting.

[9]  Peter Russer,et al.  An efficient method for computer aided noise analysis of linear amplifier networks , 1976 .

[10]  Y. Tsividis.  Operation and modeling of the MOS transistor , 1987 .

[11]  T.H. Lee,et al.  A 1.5 V, 1.5 GHz CMOS low noise amplifier , 1996, 1996 Symposium on VLSI Circuits. Digest of Technical Papers.

[12]  M. Jamal Deen.  HIGH-FREQUENCY NOISE MODELLING AND THE SCALING OF THE NOISE PARAMETERS OF POLYSILICON EMITTER BIPOLAR JUNCTION TRANSISTORS , 1996 .

[13]  M. J. Deen,et al.  Direct calculation of metal–oxide–semiconductor field effect transistor high frequency noise parameters , 1998 .

[14]  S. G. Chamberlain,et al.  A compact thermal noise model for the investigation of soft error rates in MOS VLSI digital circuits , 1989 .

[15]  Yannis Tsividis,et al.  Continuous-time MOSFET-C filters in VLSI , 1986 .

[16]  M. E. Mokari,et al.  A new method of noise parameter calculation using direct matrix analysis , 1992 .

[17]  J.A.M. Geelen,et al.  An improved de-embedding technique for on-wafer high-frequency characterization , 1991, Proceedings of the 1991 Bipolar Circuits and Technology Meeting.

[18]  S. M. Sze,et al.  Physics of semiconductor devices , 1969 .

[19]  E. Morifuji,et al.  High-frequency AC characteristics of 1.5 nm gate oxide MOSFETs , 1996, International Electron Devices Meeting. Technical Digest.

[20]  Robert G. Meyer,et al.  An engineering model for short-channel MOS devices , 1988 .

[21]  H. Williams,et al.  Analytical and experimental studies of thermal noise in MOSFET's , 1994 .

[22]  A. Birbas,et al.  Thermal noise modeling for short-channel MOSFETs , 1996 .

[23]  Seonghearn Lee,et al.  A new parameter extraction technique for small-signal equivalent circuit of polysilicon emitter bipolar transistors , 1994 .

[24]  Bing Wang,et al.  MOSFET thermal noise modeling for analog integrated circuits , 1994 .

[25]  M. J. Deen,et al.  Modelling of bonding pads and their effect on the high-frequency-noise figure of polysilicon emitter bipolar junction transistors , 1996 .

[26]  M. J. Deen,et al.  Finding the asymmetric parasitic source and drain resistances from the a.c. conductances of a single MOS transistor , 1996 .

[27]  Hermann A. Haus,et al.  Circuit Theory of Linear Noisy Networks , 1959 .

[28]  M. J. Deen,et al.  Microwave noise characterisation of poly-emitter bipolar junction transistors , 1993 .