Analyzing Methodologies of Irregular NoC Topology Synthesis

Network-On-Chip (NoC) provides a structured way of realizing communication for System on Chip (SoC) with many processing cores, which emphasize a communicationcentric, as opposed to a computation-centric, design view. Network-on-Chip architectures have a wide variety of parameters that can be optimized according to the designer’s requirements. Exploration and optimization of these parameters is an active area of research and a large number of methodologies have been proposed for this. In this paper we study the existing techniques and categorize them on the basis of considered optimization objectives.

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