Apparatus and method for data validation in flash memory

An apparatus and method of data validation of flash memory is provided that is capable of determining the validity of the data when a power supply is interrupted while a predetermined data operation is being conducted in the flash memory. The apparatus and method comprises: a user requesting unit to request a data operation using a predetermined logical address; a transformation unit to transform the logical address into a physical address; and a control unit to record count data, said count data equal to a number of bits of data stored at a physical address corresponding to the logical address having a predetermined value, in an index region to indicate whether the data is valid or invalid when conducting the data operation, wherein the bits of data having a predetermined value is "1" or "0" and said count data is equal to the number of "1" or "0" of the data stored at a physical address corresponding to the logical address.