Pulse Doppler Processing - A Novel Digital Technique

The deployment of pulse-Doppler radar becomes significant to have improved target’s range details/resolution and velocity profile. The computation associated with the process of estimating the Doppler frequency present in the radar echo signal is slightly hard in the pulsed Doppler radar, unlike the continuous wave (CW) radar. Several techniques are available in the literature for estimating the frequency components present in the radar return signal. However, they required a huge amount of hardware and/or long-running time, thus, proposing a new technique to compute the Doppler frequency particularly for pulsed radar becomes significant which is the main contribution in this paper. A simple method of frequency multiplication is the basis for the proposed new technique. Considering the available resources in the KC705 field-programmable gate array (FPGA), a new digital parallel architecture for the estimation of Doppler frequency is proposed, simulated in Matlab environment, and implemented using Xilinx tools. The coordinate rotation digital computer (CORDIC) and direct digital synthesizer (DDS) is the key algorithms used for the generation of local reference signals of wide spectrum of frequencies and in-phase (I)/quadraturephase (Q) signals. A multiply accumulation (MAC) unit is used to accumulate the results of the respective multiplier. Signal processing aspects of pulsed Doppler radar, software simulation and hardware implementation of proposed new technique and its estimation performance validation results are presented in detail.