Self-reconfigurable Embedded Systems: From Modeling to Implementation

Self-reconfigurability is becoming a reality from an hardware point of view. Many studies have shown the benefit of such a technology which allows greater flexibility, performances and cost reductions. However there are several points that still represent major challenges: i) design flow and associated tools as current solutions are too tightly connected to hardware platforms. A need for abstraction is strongly required to allow designers to build and evaluate efficient systems. ii) architecture models and associated portfolio of reconfigurable IPs as most of current solutions are based on ad hoc approaches which lack of reusability and portability. A more systematic design methodology associated to an efficient architecture model is required for a large adoption of such a technology. iii) bitstreams repository since most available solutions are based on a bitstreams library stored in Flash memory. Such an approach is not meeting scalability requirements and a more global solution is mandatory with a clear hierarchy of bitstreams repository. In this paper a comprehensive methodology is presented in order to address these three major points. Our solution leads to an efficient approach from modeling to implementation of self-reconfigurable embedded systems.