Algorithm and VLSI architecture for high performance adaptive video scaling
暂无分享,去创建一个
K. J. Ray Liu | Nitin Chandrachoodan | Arun Raghupathy | N. Chandrachoodan | K. J. Liu | A. Raghupathy
[1] D. Anastassiou,et al. Spatial resolution enhancement of images using nonlinear interpolation , 1990, International Conference on Acoustics, Speech, and Signal Processing.
[2] Sanjit K. Mitra,et al. Image Representation Using Block Pattern Models and Its Image Processing Applications , 1993, IEEE Trans. Pattern Anal. Mach. Intell..
[3] Neil Weste,et al. Principles of CMOS VLSI Design , 1985 .
[4] Anil K. Jain. Fundamentals of Digital Image Processing , 2018, Control of Color Imaging Systems.
[5] Kobchai Dejhan,et al. A new high-performance programmable delay line IC , 1989 .
[6] Jae Lim,et al. Spatial interpolation of interlaced television pictures , 1989, International Conference on Acoustics, Speech, and Signal Processing,.
[7] Keshab K. Parhi,et al. High-level algorithm and architecture transformations for DSP synthesis , 1995, J. VLSI Signal Process..
[8] Y.H. Hu,et al. CORDIC-based VLSI architectures for digital signal processing , 1992, IEEE Signal Processing Magazine.
[9] C. Joanblanq,et al. A video delay line compiler , 1990, IEEE International Symposium on Circuits and Systems.
[10] Thomas Sikora. Digital Consumer Electronics Handbook , 1997 .
[11] Jack E. Volder. The CORDIC Trigonometric Computing Technique , 1959, IRE Trans. Electron. Comput..
[12] R. Tielert,et al. A memory-based high-speed digital delay line with a large adjustable length , 1988 .
[13] J. Salonen. Edge and Motion Controlled Spatial Upconversion , 1994, IEEE International Conference on Consumer Electronics.
[14] David A. Patterson,et al. Computer Architecture: A Quantitative Approach , 1969 .