In this paper, we introduce a HF radio receiver design of differential frequency hopping communications system based on a programmable DSP chip (TMS320C6201). Our DFH radio receiver includes two main parts: a RF front-end and a DSP unit. The front-end of receiver converts directly the intermediate frequency analog signal to digital signal. The DSP unit provides intermediate frequency (IF) signal digital down-conversion and frequency recognition. Because of the computational power of DSP, to realize the sampling rates up to 10.24MSPS is a challenge, which requires analysis, selection and optimization of the algorithms to make the scheme cost-saving. It is demonstrated that with a chip of DSP processor of Texas instruments' TMS320C6201, we could successfully realize the digital down-conversion and frequency recognition for the date of 5000 hop per second.
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