High-performance macroblock coding implementation method

The invention discloses a high-performance macroblock coding implementation method, which mainly solves the problems of low processing speed, complexity in implementation, and a large number of occupied resources of the conventional method for implementing macroblock coding based on hardware. The method is implemented by the following steps of: (1) caching initial data and inter prediction data; (2) performing two-path parallel intra prediction on the current macroblock; (3), selecting the optimal mode of the intra prediction and cost thereof according to the intra prediction result; (4), acquiring the optimal mode of the inter prediction and cost thereof; (5), comparing the cost of the optimal modes of the inter prediction and the intra prediction to obtain the optimal prediction modes of the current macroblock; and (6) quantizing discrete cosine transformation (DCT) results of the optimal prediction modes and performing entropy coding and reestablishing respectively and depositing and outputting the reestablished results simultaneously. The method has the advantages that coding speed is high, a field programmable gate array (FPGA) is easy to implement and resources are fully reused, and can be used for a video coding system, particularly the video coding system with high resolution.