High-voltage drain extended MOS transistors for 0.18-/spl mu/m logic CMOS process

Complementary high-voltage drain extended (DE) MOS transistors were implemented into Texas Instruments' state-of-the-art production advanced analog and digital 1.5-1.8 V CMOS technology. These transistors allow for 5-V drain operating voltage using the core gate oxide and have drain breakdown voltages BV/sub dss/>10 V. Experimental results along with Suprem4 and MEDICI simulation results are presented to explain their operation. The novel p-channel transistors use an isolated compensated p-well as a drain extension. The n-channel version uses n-well as a drain extension. Experimental test results of I/sub ds/(V/sub ds/,V/sub gs/), I/sub gs/(V/sub ds/), and BV(L) plots demonstrate DE-MOS performance. The work was focused on performance optimization with zero process modification and hence no cost adder.