VisAll: A Universal Tool to Visualise Parallel Execution of Logic Programs

• Multicore chips have moved parallelism from niche (HPC) to mainstream –even on laptops! • According to vendors (and Intel in particular [e.g., DAMP workshops]): ⋄ Feature size reductions will continue for foreseeable future (12 generations!). ⋄ But power consumption does not allow increasing clock speeds much. ⋄ Multicore is the way to use this space without raising power consumption. ⋄ Number of cores expected to double with each generation! • But writing parallel programs hard/error-prone –how to exploit all those cores? ⋄ Ideal situation: Conventional Program + Multiprocessor = Higher Perf. → automatic parallelization. ⋄ More realistically: compiler-aided parallelization. ⋄ Languages (dialects, constructs) for parallelization+parallel programming. ⋄ Scheduling techniques [BW93, Cie92], memory management, abstract machines, etc.

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