TPL-Aware Displacement-driven Detailed Placement Refinement with Coloring Constraints

To minimize the effect of process variation for a design in triple patterning lithography (TPL), it is beneficial for all standard cells of the same type to share a single coloring solution. In this paper, we investigate the TPL-aware detailed placement refinement problem under these coloring constraints. Given an initial detailed placement, the positions of standard cells are perturbed and a TPL solution complying with the coloring constraints is derived while minimizing cell displacement, lithography conflicts and stitches. We prove that this problem is NP-complete and show that it can be formulated as a mixed integer linear program. Since mixed integer linear programming is very time consuming, we propose an effective heuristic algorithm. In our approach, important adjacent pairs of standard cells are recognized firstly, since they have significant impact on cell displacement. Then a tree-based heuristic is applied to generate a good initial solution for our linear programming-based refinement. Experimental results show that compared with mixed integer linear programming, our heuristic approach is comparable in solution quality while using very short CPU runtime.

[1]  Yici Cai,et al.  SUALD: Spacing uniformity-aware layout decomposition in triple patterning lithography , 2013, International Symposium on Quality Electronic Design (ISQED).

[2]  Yih-Lang Li,et al.  TRIAD: A triple patterning lithography aware detailed router , 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[3]  Hai Zhou,et al.  Layout decomposition with pairwise coloring for multiple patterning lithography , 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[4]  Evangeline F. Y. Young,et al.  An efficient layout decomposition approach for Triple Patterning Lithography , 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).

[5]  Zigang Xiao,et al.  A polynomial time triple patterning algorithm for cell based row-structure layout , 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[6]  Yuelin Du,et al.  Constrained pattern assignment for standard cell based triple patterning lithography , 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[7]  David Z. Pan,et al.  A high-performance triple patterning layout decomposer with balanced density , 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[8]  Kun Yuan,et al.  Layout Decomposition for Triple Patterning Lithography , 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[9]  Martin D. F. Wong,et al.  Triple patterning aware routing and its comparison with double patterning aware routing in 14nm technology , 2012, DAC Design Automation Conference 2012.

[10]  David Z. Pan,et al.  Methodology for standard cell compliance and detailed placement for triple patterning lithography , 2013, 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[11]  David S. Johnson,et al.  Computers and Intractability: A Guide to the Theory of NP-Completeness , 1978 .

[12]  Yao-Wen Chang,et al.  A novel layout decomposition algorithm for triple patterning lithography , 2012, DAC Design Automation Conference 2012.