Split-lot designs: experiments for multistage batch processes

The fabrication of integrated circuits (IC's) is accomplished through a vast sequence of processing steps. Moreover, the silicon wafers on which the IC's are produced move through the process in lots of size 24 or more. Although some processing steps are applied to individual wafers, for other steps several wafers (or even several lots) are processed simultaneously as a group. To facilitate experimentation with such a multistage batch process, “split-lot” experimental designs are attractive because they allow the experimental wafers to be split into sublots for processing. The designs are obtained by using different sets of factorial effects to define the composition of the sublots at each step. Specific examples are given with up to nine processing steps. A split-lot design balances the way in which the wafers are repartitioned at each stage in the experiment. Taguchi refers to such experiments as multiway split-unit designs. Two-way split-unit experiments arise naturally in agriculture, where some facto...